EDN

Models for high-voltage transistors in a standard CMOS process

Designers of electronics and communications systems are constantly faced with the challenge of integrating greater functionality on less silicon area. Many of the system blocks – such as power ...
EDN

110 nm Standard Cell CMOS Technology

The Fujitsu’s CS91 is 110 nm channel length standard cell product that is based on the CMOS process technology for high speed and low power System on a Chip (SoC). It has a standard cell library that ...
Design-Reuse

VeriSilicon and SMIC Jointly Announce Standard Design Platform for SMIC's Advanced 0.13-micron CMOS Process Technology

Shanghai, China - October 31, 2005-- VeriSilicon Holdings Co., Ltd. (VeriSilicon), a leading ASIC design foundry targeted at China -based foundries, and Semiconductor Manufacturing International ...
Electronics Weekly

Nanusens steps towards CMOS integration for its MEMS sensor

Nanusens has designed an all-digital capacitance measurement circuit to integrate alongside its MEMS sensors. “This means that both the sensor structure and its detection circuitry can be made at the ...
Electronic Design

Breakthrough Technology Creates MEMS Inside A Standard CMOS Wafer

An entirely new technology that is expected to drastically cut the costs of Micro Electro Mechanical Systems (MEMS) has been pioneered by Spanish company, Baolab Systems. Key to this breakthrough ...
Design-Reuse

Standard CMOS Ultrawideband Single-Chip Solutions

Ultrawideband technology has been selected to serve as the foundation for evolutionary extensions to several very successful protocols. However, the promise of ubiquitous, high-bandwidth ...
Semiconductor Engineering

Zeno Semi Expands On-Chip Memory

San Jose, Calif.-based startup Zeno Semiconductor is testing modifications and a smaller process node for the single-transistor 28nm SRAM chip it introduced in 2016, which could boost space for ...